xq052b 发表于 5-10-2013 23:04
国防的承包商都要citizen的，新移民不要想了，而且很多项目是跟美国合作的，所以大陆人。。。。。
我们实验 ...
delpierojvts 发表于 5-10-2013 23:35
谢谢哈。我seek.au了一把，发现和我match的职位都在sydney,譬如broadcom。
另外，学术界的一些research as ...
Senior Hardware Designer (FPGA / VHDL)
Senior Hardware Designer | Huge International Organisation
FPGA | High Speed | Board-Level | VHDL | Xilinx | SDRAM | DDR
Very Technical Environment | Bleeding Edge Hardware FPGA Design work
Senior Hardware Designer (FPGA / VHDL) | Exceptional permanent position with a global leader
We're looking for a Senior Hardware Engineer who can work within a complex High Speed FPGA environment. If you have the following experience/ability please do not hesitate to apply via the link below:
FPGA Design Engineers must have:
- 7 years+ commercial FPGA Design experience
- High Speed experience (minimum 200 MHz)
- Exceptional VHDL coding experience (Test Bench experience would be ideal)
- Experience with SDRAM or DDR
- Solid Board-Level experience (able to take a 'big picture' view of the PCB Design i.e. work with the PCB Designers)
- Experience writing and reviewing FPGA constraints
- The ability to debug efficiently and optimally as required (inside an FPGA and on the board)
Additional Information
Location: Melbourne City
Start Date: All dates considered (2 to 8 weeks)
Please Note: FPGA Design experience within a High Speed environment is essential. If you can demonstrate DDR or SDRAM experience as well as strong VHDL coding (Test Benches) please do not hesitate to apply.
Please press the 'apply now' button below, or call xxxx.
ljbit 发表于 8-10-2013 14:23
刚来悉尼的时候也面过Dolby的职位，hiring manager很友善但一起面我的几个senior engineer都比较tough. 后 ...
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